Thomas Henretty

Managing Engineer

Thomas S. Henretty holds a Computer Science and Engineering degree from Ohio State University in Columbus, OH. During his doctoral work, Thomas worked on designing and exploring compile-time data layout and loop tiling optimizations for stencil computations on modern SIMD architectures. He has also developed a domain-specific compiler and programming language for stencils, and has been involved in the design system-level techniques to reduce power consumption on mobile processors.


His work has been published in several conference proceedings, including the International Conference on Supercomputing, the International Conference on Compiler Construction, and the International Conference on Parallel Architectures and Compilation Techniques.

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