A Mapping Path for Multi-GPGPU Accelerated Computers from a Portable High Level Programming Abstraction



Publication Source: 3rd Workshop on General Purpose Processing on Graphics Processing Units (GPGPU), Pittsburgh, PA, USA, 2010

Programmers for GPGPU face rapidly changing substrate of programming abstractions, execution models, and hardware implementations. It has been established, through numerous demonstrations for particular conjunctions of application kernel, programming languages, and GPU hardware instance, that it is possible to achieve significant improvements in the price/performance and energy/performance over general purpose processors. But these demonstrations are each the result of significant dedicated programmer labor, which is likely to be duplicated for each new GPU hardware architecture to achieve performance portability.
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Final Report on the R-Stream 3.0 Compiler



Publication Source: DTIC AFRL-RI-RS-TR-2008-160, Reservoir Labs, Inc.

This report describes Reservoir Lab’s R-Stream compiler and mapper component developed in DARPA’s Polymorphous Computing Architecture (PCA) project. Mapping in this context is the process of transforming sequential programs into efficient parallel code to be executed on PCAs, which are a new generation of high-performance architectures with very high potential computational efficiency (FLOPS/W) yet which are programmable.

Automatic mapping is a critical technology for achieving the potential of these architectures, because these chips simultaneously achieve high FLOPS/W and programmability by otherwise compromising on the complexity of the programming task. The goal of automatic mapping is to make programmers productive: to broaden the set of programmers who can achieve the potential of the architectures beyond a few gurus who hand-code the application or limited libraries, and to make even more complex variants of the architectures usable by the gurus.


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Compilers for Embedded Systems



Publication Source: The Embedded Systems Week, Grenoble, France, October, 2009

This short presentation outlines the design of the R-Stream compiler.  See the presentation on ResearchGate  here.
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Extended Static Control Programs as a Programming Model for Accelerators; A Case Study: Targeting Clear Speed CSX700 with the R-Stream Compiler



Publication Source: The Workshop on Programming Models for Emerging Architectures (PMEA), Raleigh, NC, USA, 2009

Classical compiler technologies are failing to bridge the gap between high performance and productivity in the multicore and massively parallel architecture era. This results in two complementary trends. Firstly, the rise of many new languages to allow the user to conveniently express parallelism. However, those languages may be target-specific like, e.g., CUDA or Cn, and they leave to the programmer the complex task of extracting parallelism even if expressing it may be more convenient using, e.g., Chapel or X10. Secondly, new high-level abstractions like SPIRAL allow performance portability at the price of versatility. In this paper we discuss an alternative way. We consider a restricted class of classical programs known as Extended Static Control Programs as a programming model. We show that using simple rules while writing sequential programs with usual languages like C, our R-Stream R High-Level Compiler can achieve complex mappings to parallel architectures in a fully automatic way. We present our effort to target ClearSpeed CSX700 architecture with specific contributions to avoid costly control overhead.
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Productivity via Automatic Code Generation for PGAS Platforms with the R-Stream Compiler



Publication Source: The Workshop on Asynchrony in the PGAS Programming Model (APGAS), Yorktown Heights, NY, 2009

Emerging computing architectures present concurrent, heterogeneous, and hierarchical organizations. Explicit management of distributed memories, bulk communications, and the careful scheduling of data and computation for locality of reference appear to be necessary to achieve high efficiencies relative to the peak performance. In some cases, the architectures present mixed execution models. We present the design of a software mapping tool, the R-Stream R High-Level Compiler, which permits a simplified programming model in terms of abstracted, programmer-friendly expressions of algorithms by providing an automatic procedure for producing a mapping that conforms to the requirements for the emerging architectures.
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