Presenting at the International Conference on HPC & Simulation (HPCS)

Reservoir Labs’ Dr. Benoit Meister presents recent research on “Trading off Latency for Memory Bandwidth in Spatial Architectures using the Polyhedral Model” at the International Conference on HPC & Simulation (HPCS), during the 3rd Special Session on Compiler Architecture, Design and Optimization (CADO). This event has been postponed from 2020 to January 25 – 29, 2021 and will take place virtually. Visit the HPCS website for program details as they are published and to register for the event. For inquiries related to Reservoir’s high performance compiler technology or research, please contact us.

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